Sequential Logic, Part 2

Truth tables are nice and will help you peel away redundancy in code, but fail to take into account changes in state. AND, NAND, OR and XOR do not account for rising or falling edges. Fortunately, the computer science crowd figured out all of this decades ago and people have simplified graphics to describe much of them.

Take a look at the timers from AutomationDirect. One is the Counter Input Module, which shows the status of CP1 and CP2 as either High (1) or Low (0). With just this, you can get a pretty quick idea of how your system will behave.

This is a trivial example of what you can do with your own logic. Sketching the outputs you expect based off the range of inputs allows you to visualize what you need as inputs and will allow your team to communicate better on your end requirements, or how your system works.

RedLion has similar setups. If you create AOIs for Rockwell (or the equivalent for your programming platform of choice), you should definitely get something like this ready for your templates of your final actuators. I really enjoy having something that I can fully describe and test prior to showing your end customers.

Was this insufficiently interesting? If you are really into expanding on this type of logic, I recommend spending an hour or two on AllAboutCircuits, which gives great details on lots of electrical topics. If you are interested in logic and Karnaugh maps seem fun to you, perhaps you want to try FPGA programming. I know people in that field who enjoy working in a quiet, air conditioned office, often for a tad more than I make.